With over a trillion chips manufactured every year and application requirements evolving faster than ever (across automotive, HPC, and AI), the pressure on SoC design teams has never been higher with design space keeps growing and schedules keep shrinking. Indeed, for a complex SoC project, the number of possible co...
The semiconductor industry is entering a transformative new phase, driven by the convergence of artificial intelligence, cloud computing, and increasingly complex chip architectures. That message took center stage during the keynote talks at the Siemens EDA User2User 2026 North America conference. Executives from Si...
This paper explores how configurable and intelligent I/O technologies are transforming industrial control systems by enabling greater flexibility, improved thermal performance, and higher system uptime. Traditional fixed-function I/O architectures, while effective in stable environments, create inefficiencies throug...
Processor IP garners the most attention in SoC design, but it’s not the only IP category begging for smart choices. Every processor core needs to be fed with data; however, frequent off-chip DRAM access incurs a large clock-cycle penalty each time. Architects now want SRAM blocks distributed throughout an SoC, putti...
Delos Data wants to enable practical scale-up domains of 1000+ GPUs in flexible topology designs. The post Startup Boosts Scale-Up to 1000+ GPUs in a Single Domain appeared first on EE Times .
We now know what China’s been working on to counter U.S. sanctions on EUV technology. The post Necessity is the Mother of Invention: Huawei Replaces Moore’s Law With Her’s Law appeared first on EE Times .
The most important takeaway everyone missed at the 2026 Google I/O Conference. The post Google’s Antigravity Signals a Shift Beyond the IDE appeared first on EE Times .
CEVA, the leading licensor of wireless connectivity and smart sensing technologies, is advancing its full-stack wireless strategy with the introduction of next-generation Bluetooth High Data Throughput (HDT) capabilities and a major integrated RF subsystem design win. The announcement underscores CEVA’s growing role...
As semiconductor systems evolve toward heterogeneous integration, chiplets, 2.5D and 3D packaging, distributed observability, runtime adaptation, Fleet Learning, and lifecycle convergence governance, the industry is entering a fundamentally new operational reality. Convergence decisions are no longer driven only… Re...
Global Unichip Corp. (GUC), the Advanced ASIC Leader, will showcase Jotunn8, a next-generation data center AI inference processor developed by VSORA, at the TSMC Europe Technology Symposium. The post GUC Showcases VSORA’s Jotunn8 AI inference Processor at the TSMC Europe Technology Symposium appeared first on EE Tim...
Huawei's answer to Moore's Law without EUV promises 14A performance by 2031. The post From Shrinking Transistors to Compressing Time: Deciphering Huawei’s τ Law appeared first on EE Times .
The Singapore-based startup develops optical transceivers for the next generation of data center infrastructure. The post LightSpeed Photonics Targets AI Data Centers With 400-Gbps Near-Packaged Optical Interconnects appeared first on EE Times .
Action Technology, an IC design company, provides core technological support for hundreds of millions of consumer audio devices worldwide. The post You May Not Know Actions Technology, But You’ve Definitely “Heard” It appeared first on EE Times .
However much you prototype and test your product designs, there will always be factors outside your direct control that have significant implications for the manufacturability, efficiency, reliability and expected lifespan of your final product. One of the most important of these is the quality of the PCBs you recei...
The power and thermal issues of placing data centers in space are formidable. The post Data Centers in Space: A Brilliant Idea or Delusional? appeared first on EE Times .